SimPlus Verification products

  • SPV Testbench Studio represents a further step forward in verification technology. It is a software environment, integrated with hardware simulation, designed for writing verification test suites. Most of the framework is made up of class libraries specific to verification that may be integrated with user C++ code.

FPGA and ASIC projects

  • FPGA design targeted on Xilinx or Altera
  • ASIC front-end design
  • RTL design, VHDL and/or Verilog
  • Functional Verification
  • Test Bench design, HDL and/or TBA
  • FPGA solutions for telecommunications, system and network security